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periph_conf.h
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1/*
2 * Copyright (C) 2017 Inria
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
19#ifndef PERIPH_CONF_H
20#define PERIPH_CONF_H
21
22/* Add specific clock configuration (HSE, LSE) for this board here */
23#ifndef CONFIG_BOARD_HAS_LSE
24#define CONFIG_BOARD_HAS_LSE 1
25#endif
26
27#include "periph_cpu.h"
28#include "clk_conf.h"
29#include "cfg_rtt_default.h"
30#include "cfg_timer_tim2.h"
31
32#ifdef __cplusplus
33extern "C" {
34#endif
35
40static const uart_conf_t uart_config[] = {
41 {
42 .dev = LPUART1,
43 .rcc_mask = RCC_APB1ENR2_LPUART1EN,
44 .rx_pin = GPIO_PIN(PORT_A, 3),
45 .tx_pin = GPIO_PIN(PORT_A, 2),
46 .rx_af = GPIO_AF8,
47 .tx_af = GPIO_AF8,
48 .bus = APB12,
49 .irqn = LPUART1_IRQn,
50 .type = STM32_LPUART,
51 .clk_src = 0, /* Use APB clock */
52 },
53 {
54 .dev = USART1,
55 .rcc_mask = RCC_APB2ENR_USART1EN,
56 .rx_pin = GPIO_PIN(PORT_A, 10),
57 .tx_pin = GPIO_PIN(PORT_A, 9),
58 .rx_af = GPIO_AF7,
59 .tx_af = GPIO_AF7,
60 .bus = APB2,
61 .irqn = USART1_IRQn,
62 .type = STM32_USART,
63 .clk_src = 0, /* Use APB clock */
64#ifdef UART_USE_DMA
65 .dma_stream = 5,
66 .dma_chan = 4
67#endif
68 }
69};
70
71#define UART_0_ISR (isr_lpuart1)
72#define UART_1_ISR (isr_usart1)
73
74#define UART_NUMOF ARRAY_SIZE(uart_config)
81static const pwm_conf_t pwm_config[] = {
82 {
83 .dev = TIM1,
84 .rcc_mask = RCC_APB2ENR_TIM1EN,
85 .chan = { { .pin = GPIO_PIN(PORT_A, 8) /* D9 */, .cc_chan = 0 },
86 { .pin = GPIO_UNDEF, .cc_chan = 0 },
87 { .pin = GPIO_UNDEF, .cc_chan = 0 },
88 { .pin = GPIO_UNDEF, .cc_chan = 0 } },
89 .af = GPIO_AF1,
90 .bus = APB2
91 }
92};
93
94#define PWM_NUMOF ARRAY_SIZE(pwm_config)
101static const spi_conf_t spi_config[] = {
102 {
103 .dev = SPI2,
104 .mosi_pin = GPIO_PIN(PORT_B, 15),
105 .miso_pin = GPIO_PIN(PORT_B, 14),
106 .sclk_pin = GPIO_PIN(PORT_B, 13),
107 .cs_pin = SPI_CS_UNDEF,
108 .mosi_af = GPIO_AF5,
109 .miso_af = GPIO_AF5,
110 .sclk_af = GPIO_AF5,
111 .cs_af = GPIO_AF5,
112 .rccmask = RCC_APB1ENR1_SPI2EN,
113 .apbbus = APB1
114 }
115};
116
117#define SPI_NUMOF ARRAY_SIZE(spi_config)
124static const i2c_conf_t i2c_config[] = {
125 {
126 .dev = I2C1,
127 .speed = I2C_SPEED_NORMAL,
128 .scl_pin = GPIO_PIN(PORT_B, 8),
129 .sda_pin = GPIO_PIN(PORT_B, 7),
130 .scl_af = GPIO_AF4,
131 .sda_af = GPIO_AF4,
132 .bus = APB1,
133 .rcc_mask = RCC_APB1ENR1_I2C1EN,
134 .rcc_sw_mask = RCC_CCIPR_I2C2SEL_1, /* HSI (16 MHz) */
135 .irqn = I2C1_ER_IRQn
136 },
137};
138
139#define I2C_0_ISR isr_i2c1_er
140
141#define I2C_NUMOF ARRAY_SIZE(i2c_config)
144#ifdef __cplusplus
145}
146#endif
147
148#endif /* PERIPH_CONF_H */
@ PORT_B
port B
Definition periph_cpu.h:48
@ PORT_A
port A
Definition periph_cpu.h:47
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:278
Common configuration for STM32 Timer peripheral based on TIM2.
@ GPIO_AF1
use alternate function 1
Definition cpu_gpio.h:103
@ GPIO_AF5
use alternate function 5
Definition cpu_gpio.h:107
@ GPIO_AF4
use alternate function 4
Definition cpu_gpio.h:106
@ GPIO_AF8
use alternate function 8
Definition cpu_gpio.h:111
@ GPIO_AF7
use alternate function 7
Definition cpu_gpio.h:109
@ STM32_LPUART
STM32 Low-power UART (LPUART) module type.
Definition cpu_uart.h:39
@ STM32_USART
STM32 USART module type.
Definition cpu_uart.h:38
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition periph_cpu.h:363
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80
I2C configuration structure.
Definition periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition periph_cpu.h:300
PWM device configuration.
mini_timer_t * dev
Timer used.
SPI device configuration.
Definition periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition periph_cpu.h:338
UART device configuration.
Definition periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:219