periph_conf.h File Reference

Peripheral MCU configuration for the nucleo-f767zi board. More...

Detailed Description

Peripheral MCU configuration for the nucleo-f767zi board.

Author
Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr

Definition in file periph_conf.h.

#include "periph_cpu.h"
#include "f7/cfg_clock_216_8_1.h"
#include "cfg_i2c1_pb8_pb9.h"
#include "cfg_spi_divtable.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim2.h"
#include "cfg_usb_otg_fs.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

DMA streams configuration

#define DMA_0_ISR   isr_dma1_stream4
 
#define DMA_1_ISR   isr_dma2_stream6
 
#define DMA_2_ISR   isr_dma1_stream6
 
#define DMA_3_ISR   isr_dma2_stream0
 
#define DMA_NUMOF   ARRAY_SIZE(dma_config)
 
static const dma_conf_t dma_config []
 

UART configuration

#define UART_0_ISR   (isr_usart3)
 
#define UART_1_ISR   (isr_usart6)
 
#define UART_2_ISR   (isr_usart2)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

SPI configuration

Note
The spi_divtable is auto-generated from cpu/stm32_common/dist/spi_divtable/spi_divtable.c
#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

ETH configuration

#define ETH_RX_BUFFER_COUNT   (4)
 
#define ETH_TX_BUFFER_COUNT   (4)
 
#define ETH_RX_BUFFER_SIZE   (1524)
 
#define ETH_TX_BUFFER_SIZE   (1524)
 
#define ETH_DMA_ISR   isr_dma2_stream0
 
static const eth_conf_t eth_config
 

Variable Documentation

◆ dma_config

const dma_conf_t dma_config[]
static
Initial value:
= {
{ .stream = 4 },
{ .stream = 14 },
{ .stream = 6 },
{ .stream = 8 },
}

Definition at line 38 of file periph_conf.h.

◆ eth_config

const eth_conf_t eth_config
static
Initial value:
= {
.mode = RMII,
.mac = { 0 },
.speed = ETH_SPEED_100TX_FD,
.dma = 3,
.dma_chan = 8,
.phy_addr = 0x01,
.pins = {
}
}
port C
Definition: periph_cpu.h:38
port A
Definition: periph_cpu.h:36
port G
Definition: periph_cpu.h:42
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
Configuration for RMII.
Definition: periph_cpu.h:929
port B
Definition: periph_cpu.h:37

Definition at line 161 of file periph_conf.h.