periph_conf.h
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1 /*
2  * Copyright (C) 2017 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "periph_cpu.h"
23 #include "f7/cfg_clock_216_8_1.h"
24 #include "cfg_i2c1_pb8_pb9.h"
25 #include "cfg_rtt_default.h"
26 #include "cfg_timer_tim2.h"
27 #include "cfg_usb_otg_fs.h"
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
37 static const uart_conf_t uart_config[] = {
38  {
39  .dev = USART3,
40  .rcc_mask = RCC_APB1ENR_USART3EN,
41  .rx_pin = GPIO_PIN(PORT_D, 9),
42  .tx_pin = GPIO_PIN(PORT_D, 8),
43  .rx_af = GPIO_AF7,
44  .tx_af = GPIO_AF7,
45  .bus = APB1,
46  .irqn = USART3_IRQn,
47 #ifdef UART_USE_DMA
48  .dma_stream = 6,
49  .dma_chan = 4
50 #endif
51  },
52  {
53  .dev = USART6,
54  .rcc_mask = RCC_APB2ENR_USART6EN,
55  .rx_pin = GPIO_PIN(PORT_G, 9),
56  .tx_pin = GPIO_PIN(PORT_G, 14),
57  .rx_af = GPIO_AF8,
58  .tx_af = GPIO_AF8,
59  .bus = APB2,
60  .irqn = USART6_IRQn,
61 #ifdef UART_USE_DMA
62  .dma_stream = 5,
63  .dma_chan = 4
64 #endif
65  },
66  {
67  .dev = USART2,
68  .rcc_mask = RCC_APB1ENR_USART2EN,
69  .rx_pin = GPIO_PIN(PORT_D, 6),
70  .tx_pin = GPIO_PIN(PORT_D, 5),
71  .rx_af = GPIO_AF7,
72  .tx_af = GPIO_AF7,
73  .bus = APB1,
74  .irqn = USART2_IRQn,
75 #ifdef UART_USE_DMA
76  .dma_stream = 4,
77  .dma_chan = 4
78 #endif
79  }
80 };
81 
82 #define UART_0_ISR (isr_usart3)
83 #define UART_0_DMA_ISR (isr_dma1_stream6)
84 #define UART_1_ISR (isr_usart6)
85 #define UART_1_DMA_ISR (isr_dma1_stream5)
86 #define UART_2_ISR (isr_usart2)
87 #define UART_2_DMA_ISR (isr_dma1_stream4)
88 
89 #define UART_NUMOF ARRAY_SIZE(uart_config)
90 
92 #ifdef __cplusplus
93 }
94 #endif
95 
96 #endif /* PERIPH_CONF_H */
97 
cc2538_uart_t * dev
pointer to the used UART device
Definition: periph_cpu.h:167
Common configuration for STM32 I2C.
Common configuration for STM32 Timer peripheral based on TIM2.
use alternate function 8
Common configuration for STM32 OTG FS peripheral.
port D
Definition: periph_cpu.h:39
Configure STM32F7 clock to 216MHz and 8MHz HSE using PLL with LSE.
APB1 bus.
Definition: periph_cpu.h:147
UART device configuration.
Definition: periph_cpu.h:166
APB2 bus.
Definition: periph_cpu.h:148
port G
Definition: periph_cpu.h:42
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
use alternate function 7