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boards/nucleo-f446/include/periph_conf.h
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1 /*
2  * Copyright (C) 2016 Inria
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "periph_cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
32 #define CLOCK_HSE (8000000U) /* external oscillator */
33 #define CLOCK_CORECLOCK (180000000U) /* desired core clock frequency */
34 
35 /* the actual PLL values are automatically generated */
36 #define CLOCK_PLL_M (CLOCK_HSE / 1000000)
37 #define CLOCK_PLL_N ((CLOCK_CORECLOCK / 1000000) * 2)
38 #define CLOCK_PLL_P (2U)
39 #define CLOCK_PLL_Q (CLOCK_PLL_N / 48)
40 #define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1
41 #define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV2
42 #define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV1
43 #define CLOCK_FLASH_LATENCY FLASH_ACR_LATENCY_5WS
44 
45 /* bus clocks for simplified peripheral initialization, UPDATE MANUALLY! */
46 #define CLOCK_AHB (CLOCK_CORECLOCK / 1)
47 #define CLOCK_APB1 (CLOCK_CORECLOCK / 2)
48 #define CLOCK_APB2 (CLOCK_CORECLOCK / 1)
49 
55 static const timer_conf_t timer_config[] = {
56  {
57  .dev = TIM5,
58  .max = 0xffffffff,
59  .rcc_mask = RCC_APB1ENR_TIM5EN,
60  .bus = APB1,
61  .irqn = TIM5_IRQn
62  }
63 };
64 
65 #define TIMER_0_ISR isr_tim5
66 
67 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
68 
74 static const uart_conf_t uart_config[] = {
75  {
76  .dev = USART2,
77  .rcc_mask = RCC_APB1ENR_USART2EN,
78  .rx_pin = GPIO_PIN(PORT_A, 3),
79  .tx_pin = GPIO_PIN(PORT_A, 2),
80  .rx_af = GPIO_AF7,
81  .tx_af = GPIO_AF7,
82  .bus = APB1,
83  .irqn = USART2_IRQn,
84 #ifdef UART_USE_DMA
85  .dma_stream = 6,
86  .dma_chan = 4
87 #endif
88  },
89  {
90  .dev = USART3,
91  .rcc_mask = RCC_APB1ENR_USART3EN,
92  .rx_pin = GPIO_PIN(PORT_C, 11),
93  .tx_pin = GPIO_PIN(PORT_C, 10),
94  .rx_af = GPIO_AF7,
95  .tx_af = GPIO_AF7,
96  .bus = APB1,
97  .irqn = USART3_IRQn,
98 #ifdef UART_USE_DMA
99  .dma_stream = 5,
100  .dma_chan = 4
101 #endif
102  },
103  {
104  .dev = USART1,
105  .rcc_mask = RCC_APB2ENR_USART1EN,
106  .rx_pin = GPIO_PIN(PORT_A, 10),
107  .tx_pin = GPIO_PIN(PORT_A, 9),
108  .rx_af = GPIO_AF7,
109  .tx_af = GPIO_AF7,
110  .bus = APB2,
111  .irqn = USART1_IRQn,
112 #ifdef UART_USE_DMA
113  .dma_stream = 4,
114  .dma_chan = 4
115 #endif
116  },
117 };
118 
119 #define UART_0_ISR (isr_usart2)
120 #define UART_0_DMA_ISR (isr_dma1_stream6)
121 #define UART_1_ISR (isr_usart3)
122 #define UART_1_DMA_ISR (isr_dma1_stream5)
123 #define UART_2_ISR (isr_usart1)
124 #define UART_2_DMA_ISR (isr_dma1_stream4)
125 
126 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
127 
133 static const pwm_conf_t pwm_config[] = {
134  {
135  .dev = TIM2,
136  .rcc_mask = RCC_APB1ENR_TIM2EN,
137  .chan = { { .pin = GPIO_PIN(PORT_A, 15), .cc_chan = 0},
138  { .pin = GPIO_PIN(PORT_B, 3), .cc_chan = 1},
139  { .pin = GPIO_PIN(PORT_B, 10), .cc_chan = 2},
140  { .pin = GPIO_PIN(PORT_B, 2), .cc_chan = 3} },
141  .af = GPIO_AF1,
142  .bus = APB1
143  },
144  {
145  .dev = TIM3,
146  .rcc_mask = RCC_APB1ENR_TIM3EN,
147  .chan = { { .pin = GPIO_PIN(PORT_B, 4), .cc_chan = 0 },
148  { .pin = GPIO_UNDEF, .cc_chan = 0 },
149  { .pin = GPIO_UNDEF, .cc_chan = 0 },
150  { .pin = GPIO_UNDEF, .cc_chan = 0 } },
151  .af = GPIO_AF2,
152  .bus = APB1
153  },
154  {
155  .dev = TIM8,
156  .rcc_mask = RCC_APB2ENR_TIM8EN,
157  .chan = { { .pin = GPIO_PIN(PORT_C, 6), .cc_chan = 0},
158  { .pin = GPIO_PIN(PORT_C, 7), .cc_chan = 1},
159  { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2},
160  { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3} },
161  .af = GPIO_AF3,
162  .bus = APB2
163  },
164 };
165 
166 #define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
167 
176 static const uint8_t spi_divtable[2][5] = {
177  { /* for APB1 @ 90000000Hz */
178  7, /* -> 351562Hz */
179  7, /* -> 351562Hz */
180  6, /* -> 703125Hz */
181  3, /* -> 5625000Hz */
182  2 /* -> 11250000Hz */
183  },
184  { /* for APB2 @ 180000000Hz */
185  7, /* -> 703125Hz */
186  7, /* -> 703125Hz */
187  7, /* -> 703125Hz */
188  4, /* -> 5625000Hz */
189  3 /* -> 11250000Hz */
190  }
191 };
192 
193 static const spi_conf_t spi_config[] = {
194  {
195  .dev = SPI1,
196  .mosi_pin = GPIO_PIN(PORT_A, 7),
197  .miso_pin = GPIO_PIN(PORT_A, 6),
198  .sclk_pin = GPIO_PIN(PORT_A, 5),
199  .cs_pin = GPIO_PIN(PORT_A, 4),
200  .af = GPIO_AF5,
201  .rccmask = RCC_APB2ENR_SPI1EN,
202  .apbbus = APB2
203  },
204  {
205  .dev = SPI2,
206  .mosi_pin = GPIO_PIN(PORT_B, 15),
207  .miso_pin = GPIO_PIN(PORT_B, 14),
208  .sclk_pin = GPIO_PIN(PORT_B, 13),
209  .cs_pin = GPIO_PIN(PORT_B, 12),
210  .af = GPIO_AF5,
211  .rccmask = RCC_APB1ENR_SPI2EN,
212  .apbbus = APB1
213  },
214  {
215  .dev = SPI3,
216  .mosi_pin = GPIO_PIN(PORT_C, 12),
217  .miso_pin = GPIO_PIN(PORT_C, 11),
218  .sclk_pin = GPIO_PIN(PORT_C, 10),
219  .cs_pin = GPIO_UNDEF,
220  .af = GPIO_AF6,
221  .rccmask = RCC_APB1ENR_SPI3EN,
222  .apbbus = APB1
223  }
224 };
225 
226 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
227 
234 #define I2C_NUMOF (1U)
235 #define I2C_0_EN 1
236 #define I2C_IRQ_PRIO 1
237 #define I2C_APBCLK (42000000U)
238 
239 /* I2C 0 device configuration */
240 #define I2C_0_DEV I2C1
241 #define I2C_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_I2C1EN))
242 #define I2C_0_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_I2C1EN))
243 #define I2C_0_EVT_IRQ I2C1_EV_IRQn
244 #define I2C_0_EVT_ISR isr_i2c1_ev
245 #define I2C_0_ERR_IRQ I2C1_ER_IRQn
246 #define I2C_0_ERR_ISR isr_i2c1_er
247 /* I2C 0 pin configuration */
248 #define I2C_0_SCL_PORT GPIOB
249 #define I2C_0_SCL_PIN 8
250 #define I2C_0_SCL_AF 4
251 #define I2C_0_SCL_CLKEN() (periph_clk_en(AHB1, RCC_AHB1ENR_GPIOBEN))
252 #define I2C_0_SDA_PORT GPIOB
253 #define I2C_0_SDA_PIN 9
254 #define I2C_0_SDA_AF 4
255 #define I2C_0_SDA_CLKEN() (periph_clk_en(AHB1, RCC_AHB1ENR_GPIOBEN))
256 
262 #define ADC_NUMOF (0)
263 
269 #define DAC_NUMOF (0)
270 
272 #ifdef __cplusplus
273 }
274 #endif
275 
276 #endif /* PERIPH_CONF_H */
277 
use alternate function 7
USART_TypeDef * dev
USART device used.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
use alternate function 6
use alternate function 3
use alternate function 1
PWM configuration structure.
LPC_CTxxBx_Type * dev
PWM device.
use alternate function 5
UART device configuration.
#define GPIO_UNDEF
Define a custom GPIO_UNDEF value.
SPI configuration data structure.
cc2538_gptimer_t * dev
timer device
Timer configuration data.
use alternate function 2
cc2538_ssi_t * dev
SSI device.