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periph_conf.h File Reference
#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_i2c1_pb8_pb9.h"
#include "cfg_timer_tim5_and_tim2.h"
#include "cfg_usb_otg_fs.h"
#include "mii.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

Peripheral MCU configuration for the nucleo-f429zi board

Author
Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr
#define CONFIG_BOARD_HAS_LSE   1
 
#define CONFIG_BOARD_HAS_HSE   1
 

DMA streams configuration

#define DMA_0_ISR   isr_dma2_stream3
 
#define DMA_1_ISR   isr_dma2_stream2
 
#define DMA_2_ISR   isr_dma2_stream0
 
#define DMA_NUMOF   ARRAY_SIZE(dma_config)
 
static const dma_conf_t dma_config []
 

UART configuration

#define UART_0_ISR   (isr_usart3)
 
#define UART_1_ISR   (isr_usart6)
 
#define UART_2_ISR   (isr_usart2)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

PWM configuration

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)
 
static const pwm_conf_t pwm_config []
 

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

ADC configuration

Note that we do not configure all ADC channels, and not in the STM32F429zi order.

Instead, we just define 6 ADC channels, for the Nucleo Arduino header pins A0-A5 and the internal VBAT channel.

#define VBAT_ADC   ADC_LINE(6)
 VBAT ADC line.
 
#define ADC_NUMOF   ARRAY_SIZE(adc_config)
 
static const adc_conf_t adc_config []
 

ETH configuration

#define ETH_DMA_ISR   isr_dma2_stream0
 
static const eth_conf_t eth_config
 

Macro Definition Documentation

◆ ADC_NUMOF

#define ADC_NUMOF   ARRAY_SIZE(adc_config)

Definition at line 196 of file periph_conf.h.

◆ CONFIG_BOARD_HAS_HSE

#define CONFIG_BOARD_HAS_HSE   1

Definition at line 29 of file periph_conf.h.

◆ CONFIG_BOARD_HAS_LSE

#define CONFIG_BOARD_HAS_LSE   1

Definition at line 24 of file periph_conf.h.

◆ DMA_0_ISR

#define DMA_0_ISR   isr_dma2_stream3

Definition at line 53 of file periph_conf.h.

◆ DMA_1_ISR

#define DMA_1_ISR   isr_dma2_stream2

Definition at line 54 of file periph_conf.h.

◆ DMA_2_ISR

#define DMA_2_ISR   isr_dma2_stream0

Definition at line 55 of file periph_conf.h.

◆ DMA_NUMOF

#define DMA_NUMOF   ARRAY_SIZE(dma_config)

Definition at line 57 of file periph_conf.h.

◆ ETH_DMA_ISR

#define ETH_DMA_ISR   isr_dma2_stream0

Definition at line 222 of file periph_conf.h.

◆ PWM_NUMOF

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)

Definition at line 143 of file periph_conf.h.

◆ SPI_NUMOF

#define SPI_NUMOF   ARRAY_SIZE(spi_config)

Definition at line 172 of file periph_conf.h.

◆ UART_0_ISR

#define UART_0_ISR   (isr_usart3)

Definition at line 109 of file periph_conf.h.

◆ UART_1_ISR

#define UART_1_ISR   (isr_usart6)

Definition at line 110 of file periph_conf.h.

◆ UART_2_ISR

#define UART_2_ISR   (isr_usart2)

Definition at line 111 of file periph_conf.h.

◆ UART_NUMOF

#define UART_NUMOF   ARRAY_SIZE(uart_config)

Definition at line 113 of file periph_conf.h.

◆ VBAT_ADC

#define VBAT_ADC   ADC_LINE(6)

VBAT ADC line.

Definition at line 195 of file periph_conf.h.

Variable Documentation

◆ adc_config

const adc_conf_t adc_config[]
static
Initial value:
= {
{GPIO_PIN(PORT_A, 3), 2, 3},
{GPIO_PIN(PORT_C, 0), 2, 10},
{GPIO_PIN(PORT_C, 3), 2, 13},
{GPIO_PIN(PORT_F, 3), 2, 9},
{GPIO_PIN(PORT_F, 5), 2, 15},
{GPIO_PIN(PORT_F, 10), 2, 8},
{GPIO_UNDEF, 0, 18},
}
@ PORT_C
port C
Definition periph_cpu.h:49
@ PORT_F
port F
Definition periph_cpu.h:52
@ PORT_A
port A
Definition periph_cpu.h:47
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.

Definition at line 185 of file periph_conf.h.

◆ dma_config

const dma_conf_t dma_config[]
static
Initial value:
= {
{ .stream = 11 },
{ .stream = 10 },
{ .stream = 8 },
}

Definition at line 47 of file periph_conf.h.

◆ eth_config

const eth_conf_t eth_config
static
Initial value:
= {
.mode = RMII,
.dma = 2,
.dma_chan = 8,
.phy_addr = 0x00,
.pins = {
}
}
@ PORT_B
port B
Definition periph_cpu.h:48
@ PORT_G
port G
Definition periph_cpu.h:53
@ RMII
Configuration for RMII.
Definition cpu_eth.h:37
#define MII_BMCR_FULL_DPLX
Set for full duplex.
Definition mii.h:69
#define MII_BMCR_SPEED_100
Set speed to 100 Mbps.
Definition mii.h:73

Definition at line 203 of file periph_conf.h.

◆ pwm_config

const pwm_conf_t pwm_config[]
static
Initial value:
= {
{
.dev = TIM1,
.rcc_mask = RCC_APB2ENR_TIM1EN,
.chan = { { .pin = GPIO_PIN(PORT_E, 9) , .cc_chan = 0},
{ .pin = GPIO_PIN(PORT_E, 11) , .cc_chan = 1},
{ .pin = GPIO_PIN(PORT_E, 13) , .cc_chan = 2},
{ .pin = GPIO_UNDEF, .cc_chan = 0} },
.af = GPIO_AF1,
.bus = APB2
},
{
.dev = TIM4,
.rcc_mask = RCC_APB1ENR_TIM4EN,
.chan = { { .pin = GPIO_PIN(PORT_D, 15) , .cc_chan = 3},
{ .pin = GPIO_UNDEF, .cc_chan = 0},
{ .pin = GPIO_UNDEF, .cc_chan = 0},
{ .pin = GPIO_UNDEF, .cc_chan = 0} },
.af = GPIO_AF2,
.bus = APB1
},
}
@ PORT_E
port E
Definition periph_cpu.h:51
@ PORT_D
port D
Definition periph_cpu.h:50
@ GPIO_AF1
use alternate function 1
Definition cpu_gpio.h:103
@ GPIO_AF2
use alternate function 2
Definition cpu_gpio.h:104
@ APB1
Advanced Peripheral Bus 1
Definition periph_cpu.h:79
@ APB2
Advanced Peripheral Bus 2
Definition periph_cpu.h:80

Definition at line 120 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_UNDEF,
.mosi_af = GPIO_AF5,
.miso_af = GPIO_AF5,
.sclk_af = GPIO_AF5,
.cs_af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
}
}
@ GPIO_AF5
use alternate function 5
Definition cpu_gpio.h:107

Definition at line 150 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static

Definition at line 64 of file periph_conf.h.