periph_conf.h File Reference
#include "periph_cpu.h"
#include "f4/cfg_clock_100_8_1.h"
#include "cfg_i2c1_pb8_pb9.h"
#include "cfg_timer_tim5.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

UART configuration

#define UART_0_ISR   (isr_usart3)
 
#define UART_0_DMA_ISR   (isr_dma1_stream6)
 
#define UART_1_ISR   (isr_usart6)
 
#define UART_1_DMA_ISR   (isr_dma1_stream5)
 
#define UART_2_ISR   (isr_usart2)
 
#define UART_2_DMA_ISR   (isr_dma1_stream4)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

PWM configuration

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)
 
static const pwm_conf_t pwm_config []
 

SPI configuration

Note
The spi_divtable is auto-generated from cpu/stm32_common/dist/spi_divtable/spi_divtable.c
#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const uint8_t spi_divtable [2][5]
 
static const spi_conf_t spi_config []
 

ADC configuration

Note that we do not configure all ADC channels, and not in the STM32F413zh order.

Instead, we just define 6 ADC channels, for the Nucleo Arduino header pins A0-A5

#define ADC_NUMOF   (6U)
 
#define ADC_CONFIG
 

RTT configuration

#define RTT_NUMOF   (1)
 
#define RTT_FREQUENCY   (4096)
 
#define RTT_MAX_VALUE   (0xffff)
 

Macro Definition Documentation

◆ ADC_CONFIG

#define ADC_CONFIG
Value:
{ \
{GPIO_PIN(PORT_A, 3), 0, 3}, \
{GPIO_PIN(PORT_C, 0), 0, 10}, \
{GPIO_PIN(PORT_C, 3), 0, 13}, \
{GPIO_PIN(PORT_C, 1), 0, 11}, \
{GPIO_PIN(PORT_C, 4), 0, 14}, \
{GPIO_PIN(PORT_C, 5), 0, 15}, \
}
port C
Definition: periph_cpu.h:38
port A
Definition: periph_cpu.h:36
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35

Definition at line 202 of file periph_conf.h.

Variable Documentation

◆ pwm_config

const pwm_conf_t pwm_config[]
static
Initial value:
= {
{
.dev = TIM1,
.rcc_mask = RCC_APB2ENR_TIM1EN,
.chan = { { .pin = GPIO_PIN(PORT_E, 9) , .cc_chan = 0},
{ .pin = GPIO_PIN(PORT_E, 11) , .cc_chan = 1},
{ .pin = GPIO_PIN(PORT_E, 13) , .cc_chan = 2},
{ .pin = GPIO_UNDEF, .cc_chan = 0} },
.af = GPIO_AF1,
.bus = APB2
},
{
.dev = TIM4,
.rcc_mask = RCC_APB1ENR_TIM4EN,
.chan = { { .pin = GPIO_PIN(PORT_D, 15) , .cc_chan = 3},
{ .pin = GPIO_UNDEF, .cc_chan = 0},
{ .pin = GPIO_UNDEF, .cc_chan = 0},
{ .pin = GPIO_UNDEF, .cc_chan = 0} },
.af = GPIO_AF2,
.bus = APB1
},
}
APB1 bus.
use alternate function 1
port E
Definition: periph_cpu.h:40
port D
Definition: periph_cpu.h:39
APB2 bus.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
use alternate function 2

Definition at line 119 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
}
}
port A
Definition: periph_cpu.h:36
APB2 bus.
use alternate function 5
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35

Definition at line 169 of file periph_conf.h.

◆ spi_divtable

const uint8_t spi_divtable[2][5]
static
Initial value:
= {
{
7,
6,
5,
2,
1
},
{
7,
7,
6,
3,
2
}
}

Definition at line 152 of file periph_conf.h.