boards/nucleo-f410/include/periph_conf.h File Reference
#include "periph_cpu.h"
+ Include dependency graph for boards/nucleo-f410/include/periph_conf.h:

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Macros

Clock system configuration
#define CLOCK_HSE   (8000000U) /* external oscillator */
 
#define CLOCK_CORECLOCK   (100000000U) /* desired core clock frequency */
 
#define CLOCK_PLL_M   (CLOCK_HSE / 1000000)
 
#define CLOCK_PLL_N   ((CLOCK_CORECLOCK / 1000000) * 2)
 
#define CLOCK_PLL_P   (2U)
 
#define CLOCK_PLL_Q   (CLOCK_PLL_N / 48)
 
#define CLOCK_AHB_DIV   RCC_CFGR_HPRE_DIV1
 
#define CLOCK_APB1_DIV   RCC_CFGR_PPRE1_DIV2
 
#define CLOCK_APB2_DIV   RCC_CFGR_PPRE2_DIV1
 
#define CLOCK_FLASH_LATENCY   FLASH_ACR_LATENCY_5WS
 
#define CLOCK_AHB   (CLOCK_CORECLOCK / 1)
 
#define CLOCK_APB1   (CLOCK_CORECLOCK / 2)
 
#define CLOCK_APB2   (CLOCK_CORECLOCK / 1)
 
I2C configuration
#define I2C_NUMOF   (1U)
 
#define I2C_0_EN   1
 
#define I2C_IRQ_PRIO   1
 
#define I2C_APBCLK   (CLOCK_APB1)
 
#define I2C_0_DEV   I2C1
 
#define I2C_0_CLKEN()   (RCC->APB1ENR |= RCC_APB1ENR_I2C1EN)
 
#define I2C_0_CLKDIS()   (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C1EN))
 
#define I2C_0_EVT_IRQ   I2C1_EV_IRQn
 
#define I2C_0_EVT_ISR   isr_i2c1_ev
 
#define I2C_0_ERR_IRQ   I2C1_ER_IRQn
 
#define I2C_0_ERR_ISR   isr_i2c1_er
 
#define I2C_0_SCL_PORT   GPIOB
 
#define I2C_0_SCL_PIN   8
 
#define I2C_0_SCL_AF   4
 
#define I2C_0_SCL_CLKEN()   (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
 
#define I2C_0_SDA_PORT   GPIOB
 
#define I2C_0_SDA_PIN   9
 
#define I2C_0_SDA_AF   4
 
#define I2C_0_SDA_CLKEN()   (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
 
ADC configuration
#define ADC_NUMOF   (0)
 
DAC configuration
#define DAC_NUMOF   (0)
 

Timer configuration

#define TIMER_0_ISR   isr_tim5
 
#define TIMER_NUMOF   (sizeof(timer_config) / sizeof(timer_config[0]))
 
static const timer_conf_t timer_config []
 

UART configuration

#define UART_0_ISR   (isr_usart2)
 
#define UART_0_DMA_ISR   (isr_dma1_stream6)
 
#define UART_1_ISR   (isr_usart1)
 
#define UART_1_DMA_ISR   (isr_dma1_stream5)
 
#define UART_NUMOF   (sizeof(uart_config) / sizeof(uart_config[0]))
 
static const uart_conf_t uart_config []
 

SPI configuration

Note
The spi_divtable is auto-generated from cpu/stm32_common/dist/spi_divtable/spi_divtable.c
#define SPI_NUMOF   (sizeof(spi_config) / sizeof(spi_config[0]))
 
static const uint8_t spi_divtable [2][5]
 
static const spi_conf_t spi_config []
 

Variable Documentation

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_A, 7),
.miso_pin = GPIO_PIN(PORT_A, 6),
.sclk_pin = GPIO_PIN(PORT_A, 5),
.cs_pin = GPIO_PIN(PORT_A, 4),
.af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2
}
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
use alternate function 5

Definition at line 139 of file boards/nucleo-f410/include/periph_conf.h.

const uint8_t spi_divtable[2][5]
static
Initial value:
= {
{
7,
6,
5,
2,
1
},
{
7,
7,
6,
3,
2
}
}

Definition at line 122 of file boards/nucleo-f410/include/periph_conf.h.

const timer_conf_t timer_config[]
static
Initial value:
= {
{
.dev = TIM5,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM5EN,
.bus = APB1,
.irqn = TIM5_IRQn
}
}

Definition at line 55 of file boards/nucleo-f410/include/periph_conf.h.

const uart_conf_t uart_config[]
static
Initial value:
= {
{
.dev = USART2,
.rcc_mask = RCC_APB1ENR_USART2EN,
.rx_pin = GPIO_PIN(PORT_A, 3),
.tx_pin = GPIO_PIN(PORT_A, 2),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB1,
.irqn = USART2_IRQn,
},
{
.dev = USART1,
.rcc_mask = RCC_APB2ENR_USART1EN,
.rx_pin = GPIO_PIN(PORT_A, 10),
.tx_pin = GPIO_PIN(PORT_A, 9),
.rx_af = GPIO_AF7,
.tx_af = GPIO_AF7,
.bus = APB2,
.irqn = USART1_IRQn,
}
}
use alternate function 7
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.

Definition at line 74 of file boards/nucleo-f410/include/periph_conf.h.