boards/nucleo-f091/include/periph_conf.h
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1 /*
2  * Copyright (C) 2015 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "periph_cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
32 #define CLOCK_HSE (8000000U) /* external oscillator */
33 #define CLOCK_CORECLOCK (48000000U) /* desired core clock frequency */
34 
35 /* the actual PLL values are automatically generated */
36 #define CLOCK_PLL_MUL (CLOCK_CORECLOCK / CLOCK_HSE)
37 
38 /* bus clocks for simplified peripheral initialization, UPDATE MANUALLY! */
39 #define CLOCK_AHB (CLOCK_CORECLOCK / 1)
40 #define CLOCK_APB2 (CLOCK_CORECLOCK / 1)
41 #define CLOCK_APB1 (CLOCK_CORECLOCK / 1)
42 
48 static const timer_conf_t timer_config[] = {
49  {
50  .dev = TIM1,
51  .max = 0x0000ffff,
52  .rcc_mask = RCC_APB2ENR_TIM1EN,
53  .bus = APB2,
54  .irqn = TIM1_CC_IRQn
55  }
56 };
57 
58 #define TIMER_0_ISR isr_tim1_cc
59 
60 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
61 
67 static const uart_conf_t uart_config[] = {
68  {
69  .dev = USART2,
70  .rcc_mask = RCC_APB1ENR_USART2EN,
71  .rx_pin = GPIO_PIN(PORT_A, 3),
72  .tx_pin = GPIO_PIN(PORT_A, 2),
73  .rx_af = GPIO_AF1,
74  .tx_af = GPIO_AF1,
75  .bus = APB1,
76  .irqn = USART2_IRQn
77  },
78  {
79  .dev = USART1,
80  .rcc_mask = RCC_APB2ENR_USART1EN,
81  .rx_pin = GPIO_PIN(PORT_A, 10),
82  .tx_pin = GPIO_PIN(PORT_A, 9),
83  .rx_af = GPIO_AF1,
84  .tx_af = GPIO_AF1,
85  .bus = APB2,
86  .irqn = USART1_IRQn
87  },
88  {
89  .dev = USART3,
90  .rcc_mask = RCC_APB1ENR_USART3EN,
91  .rx_pin = GPIO_PIN(PORT_C, 11),
92  .tx_pin = GPIO_PIN(PORT_C, 10),
93  .rx_af = GPIO_AF1,
94  .tx_af = GPIO_AF1,
95  .bus = APB1,
96  .irqn = USART3_8_IRQn
97  },
98 };
99 
100 #define UART_0_ISR (isr_usart2)
101 #define UART_1_ISR (isr_usart1)
102 #define UART_2_ISR (isr_usart3_8)
103 
104 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
105 
115 static const uint8_t spi_divtable[2][5] = {
116  { /* for APB1 @ 48000000Hz */
117  7, /* -> 187500Hz */
118  6, /* -> 375000Hz */
119  5, /* -> 750000Hz */
120  2, /* -> 6000000Hz */
121  1 /* -> 12000000Hz */
122  },
123  { /* for APB2 @ 48000000Hz */
124  7, /* -> 187500Hz */
125  6, /* -> 375000Hz */
126  5, /* -> 750000Hz */
127  2, /* -> 6000000Hz */
128  1 /* -> 12000000Hz */
129  }
130 };
131 
132 static const spi_conf_t spi_config[] = {
133  {
134  .dev = SPI1,
135  .mosi_pin = GPIO_PIN(PORT_A, 7),
136  .miso_pin = GPIO_PIN(PORT_A, 6),
137  .sclk_pin = GPIO_PIN(PORT_A, 5),
138  .cs_pin = GPIO_PIN(PORT_B, 6),
139  .af = GPIO_AF0,
140  .rccmask = RCC_APB2ENR_SPI1EN,
141  .apbbus = APB2
142  }
143 };
144 
145 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
146 
153 static const pwm_conf_t pwm_config[] = {
154  {
155  .dev = TIM2,
156  .rcc_mask = RCC_APB1ENR_TIM2EN,
157  .chan = { { .pin = GPIO_PIN(PORT_B, 3) /* D3 */, .cc_chan = 1 },
158  { .pin = GPIO_PIN(PORT_B, 10) /* D6 */, .cc_chan = 2 },
159  { .pin = GPIO_PIN(PORT_B, 11) , .cc_chan = 3 },
160  { .pin = GPIO_UNDEF, .cc_chan = 0 } },
161  .af = GPIO_AF2,
162  .bus = APB1
163  },
164  {
165  .dev = TIM3,
166  .rcc_mask = RCC_APB1ENR_TIM3EN,
167  .chan = { { .pin = GPIO_PIN(PORT_B, 4) /* D5 */, .cc_chan = 0 },
168  { .pin = GPIO_PIN(PORT_C, 7) /* D9 */, .cc_chan = 1 },
169  { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 },
170  { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } },
171  .af = GPIO_AF0,
172  .bus = APB1
173  }
174 };
175 
176 #define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
177 
188 #define RTC_NUMOF (1U)
189 
195 #define ADC_CONFIG { \
196  { GPIO_PIN(PORT_A, 0), 0 },\
197  { GPIO_PIN(PORT_A, 1), 1 },\
198  { GPIO_PIN(PORT_A, 4), 4 },\
199  { GPIO_PIN(PORT_B, 0), 8 },\
200  { GPIO_PIN(PORT_C, 1), 11 },\
201  { GPIO_PIN(PORT_C, 0), 10 } \
202 }
203 
204 #define ADC_NUMOF (6)
205 
207 #ifdef __cplusplus
208 }
209 #endif
210 
211 #endif /* PERIPH_CONF_H */
212 
USART_TypeDef * dev
USART device used.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
use alternate function 1
PWM configuration structure.
use alternate function 0
LPC_CTxxBx_Type * dev
PWM device.
UART device configuration.
#define GPIO_UNDEF
Define a custom GPIO_UNDEF value.
SPI module configuration options.
cc2538_gptimer_t * dev
timer device
Timer configuration data.
use alternate function 2
cc2538_ssi_t * dev
SSI device.