boards/nucleo-f072/include/periph_conf.h
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1 /*
2  * Copyright (C) 2015 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
20 #ifndef PERIPH_CONF_H
21 #define PERIPH_CONF_H
22 
23 #include "periph_cpu.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
33 #define CLOCK_HSE (8000000U) /* external oscillator */
34 #define CLOCK_CORECLOCK (48000000U) /* desired core clock frequency */
35 
36 /* the actual PLL values are automatically generated */
37 #define CLOCK_PLL_MUL (CLOCK_CORECLOCK / CLOCK_HSE)
38 
39 /* bus clocks for simplified peripheral initialization, UPDATE MANUALLY! */
40 #define CLOCK_AHB (CLOCK_CORECLOCK / 1)
41 #define CLOCK_APB2 (CLOCK_CORECLOCK / 1)
42 #define CLOCK_APB1 (CLOCK_CORECLOCK / 1)
43 
49 static const timer_conf_t timer_config[] = {
50  {
51  .dev = TIM1,
52  .max = 0x0000ffff,
53  .rcc_mask = RCC_APB2ENR_TIM1EN,
54  .bus = APB2,
55  .irqn = TIM1_CC_IRQn
56  }
57 };
58 
59 #define TIMER_0_ISR isr_tim1_cc
60 
61 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
62 
68 static const uart_conf_t uart_config[] = {
69  {
70  .dev = USART2,
71  .rcc_mask = RCC_APB1ENR_USART2EN,
72  .rx_pin = GPIO_PIN(PORT_A, 3),
73  .tx_pin = GPIO_PIN(PORT_A, 2),
74  .rx_af = GPIO_AF1,
75  .tx_af = GPIO_AF1,
76  .bus = APB1,
77  .irqn = USART2_IRQn
78  },
79  {
80  .dev = USART1,
81  .rcc_mask = RCC_APB2ENR_USART1EN,
82  .rx_pin = GPIO_PIN(PORT_A, 10),
83  .tx_pin = GPIO_PIN(PORT_A, 9),
84  .rx_af = GPIO_AF1,
85  .tx_af = GPIO_AF1,
86  .bus = APB2,
87  .irqn = USART1_IRQn
88  },
89  {
90  .dev = USART3,
91  .rcc_mask = RCC_APB1ENR_USART3EN,
92  .rx_pin = GPIO_PIN(PORT_C, 11),
93  .tx_pin = GPIO_PIN(PORT_C, 10),
94  .rx_af = GPIO_AF1,
95  .tx_af = GPIO_AF1,
96  .bus = APB1,
97  .irqn = USART3_8_IRQn
98  }
99 };
100 
101 #define UART_0_ISR (isr_usart2)
102 #define UART_1_ISR (isr_usart1)
103 #define UART_2_ISR (isr_usart3_8)
104 
105 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
106 
112 static const pwm_conf_t pwm_config[] = {
113  {
114  .dev = TIM2,
115  .rcc_mask = RCC_APB1ENR_TIM2EN,
116  .chan = { { .pin = GPIO_PIN(PORT_B, 3) /* D3 */, .cc_chan = 1 },
117  { .pin = GPIO_PIN(PORT_B, 10) /* D6 */, .cc_chan = 2 },
118  { .pin = GPIO_PIN(PORT_B, 11) , .cc_chan = 3 },
119  { .pin = GPIO_UNDEF, .cc_chan = 0 } },
120  .af = GPIO_AF2,
121  .bus = APB1
122  },
123  {
124  .dev = TIM3,
125  .rcc_mask = RCC_APB1ENR_TIM3EN,
126  .chan = { { .pin = GPIO_PIN(PORT_B, 4) /* D5 */, .cc_chan = 0 },
127  { .pin = GPIO_PIN(PORT_B, 5) /* D4 */, .cc_chan = 1 },
128  { .pin = GPIO_UNDEF, .cc_chan = 0 },
129  { .pin = GPIO_UNDEF, .cc_chan = 0 } },
130  .af = GPIO_AF1,
131  .bus = APB1
132  },
133  {
134  .dev = TIM15,
135  .rcc_mask = RCC_APB2ENR_TIM15EN,
136  .chan = { { .pin = GPIO_PIN(PORT_B, 14), .cc_chan = 0 },
137  { .pin = GPIO_PIN(PORT_B, 15), .cc_chan = 1 },
138  { .pin = GPIO_UNDEF, .cc_chan = 0 },
139  { .pin = GPIO_UNDEF, .cc_chan = 0 } },
140  .af = GPIO_AF1,
141  .bus = APB2
142  }
143 };
144 
145 #define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
146 
155 static const uint8_t spi_divtable[2][5] = {
156  { /* for APB1 @ 48000000Hz */
157  7, /* -> 187500Hz */
158  6, /* -> 375000Hz */
159  5, /* -> 750000Hz */
160  2, /* -> 6000000Hz */
161  1 /* -> 12000000Hz */
162  },
163  { /* for APB2 @ 48000000Hz */
164  7, /* -> 187500Hz */
165  6, /* -> 375000Hz */
166  5, /* -> 750000Hz */
167  2, /* -> 6000000Hz */
168  1 /* -> 12000000Hz */
169  }
170 };
171 
172 static const spi_conf_t spi_config[] = {
173  {
174  .dev = SPI1,
175  .mosi_pin = GPIO_PIN(PORT_A, 7),
176  .miso_pin = GPIO_PIN(PORT_A, 6),
177  .sclk_pin = GPIO_PIN(PORT_A, 5),
178  .cs_pin = GPIO_PIN(PORT_A, 4),
179  .af = GPIO_AF0,
180  .rccmask = RCC_APB2ENR_SPI1EN,
181  .apbbus = APB2
182  }
183 };
184 
185 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
186 
192 #define ADC_CONFIG { \
193  { GPIO_PIN(PORT_A, 0), 0 }, \
194  { GPIO_PIN(PORT_A, 1), 1 }, \
195  { GPIO_PIN(PORT_A, 4), 4 }, \
196  { GPIO_PIN(PORT_B, 0), 8 }, \
197  { GPIO_PIN(PORT_C, 1), 11 },\
198  { GPIO_PIN(PORT_C, 0), 10 } \
199 }
200 
201 #define ADC_NUMOF (6)
202 
208 #define DAC_NUMOF (0)
209 
220 #define RTC_NUMOF (1U)
221 
223 #ifdef __cplusplus
224 }
225 #endif
226 
227 #endif /* PERIPH_CONF_H */
228 
USART_TypeDef * dev
USART device used.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
use alternate function 1
PWM configuration structure.
use alternate function 0
LPC_CTxxBx_Type * dev
PWM device.
UART device configuration.
#define GPIO_UNDEF
Define a custom GPIO_UNDEF value.
SPI configuration data structure.
cc2538_gptimer_t * dev
timer device
Timer configuration data.
use alternate function 2
cc2538_ssi_t * dev
SSI device.