periph_conf.h File Reference

Peripheral MCU configuration for the ST I-NUCLEO-LRWAN1 board. More...

Detailed Description

Peripheral MCU configuration for the ST I-NUCLEO-LRWAN1 board.

Author
Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr

Definition in file periph_conf.h.

#include "periph_cpu.h"
#include "l0/cfg_clock_32_16_1.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim2.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

UART configuration

#define UART_0_ISR   (isr_rng_lpuart1)
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

SPI configuration

Note
The spi_divtable is auto-generated from cpu/stm32_common/dist/spi_divtable/spi_divtable.c
#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const uint8_t spi_divtable [2][5]
 
static const spi_conf_t spi_config []
 

I2C configuration

#define I2C_0_ISR   isr_i2c1
 
#define I2C_NUMOF   ARRAY_SIZE(i2c_config)
 
static const i2c_conf_t i2c_config []
 

Variable Documentation

◆ i2c_config

const i2c_conf_t i2c_config[]
static
Initial value:
= {
{
.dev = I2C1,
.speed = I2C_SPEED_NORMAL,
.scl_pin = GPIO_PIN(PORT_B, 6),
.sda_pin = GPIO_PIN(PORT_B, 7),
.scl_af = GPIO_AF1,
.sda_af = GPIO_AF1,
.bus = APB1,
.rcc_mask = RCC_APB1ENR_I2C1EN,
.irqn = I2C1_IRQn
}
}
APB1 bus.
use alternate function 1
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
normal mode: ~100kbit/s
Definition: periph_cpu.h:116
port B
Definition: periph_cpu.h:37

Definition at line 99 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI1,
.mosi_pin = GPIO_PIN(PORT_A, 12),
.miso_pin = GPIO_PIN(PORT_B, 4),
.sclk_pin = GPIO_PIN(PORT_B, 3),
.cs_pin = GPIO_PIN(PORT_A, 15),
.af = GPIO_AF0,
.rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2,
},
}
use alternate function 0
port A
Definition: periph_cpu.h:36
APB2 bus.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
port B
Definition: periph_cpu.h:37

Definition at line 79 of file periph_conf.h.

◆ spi_divtable

const uint8_t spi_divtable[2][5]
static
Initial value:
= {
{
7,
5,
4,
2,
1
},
{
7,
5,
4,
2,
1
}
}

Definition at line 62 of file periph_conf.h.

◆ uart_config

const uart_conf_t uart_config[]
static
Initial value:
= {
{
.dev = LPUART1,
.rcc_mask = RCC_APB1ENR_LPUART1EN,
.rx_pin = GPIO_PIN(PORT_B, 11),
.tx_pin = GPIO_PIN(PORT_B, 10),
.rx_af = GPIO_AF4,
.tx_af = GPIO_AF4,
.bus = APB1,
.irqn = LPUART1_IRQn,
.type = STM32_LPUART,
.clk_src = 0,
},
}
use alternate function 4
APB1 bus.
STM32 Low-power UART (LPUART) module type.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:35
port B
Definition: periph_cpu.h:37

Definition at line 35 of file periph_conf.h.