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periph_conf.h
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1/*
2 * Copyright (C) 2017 Ken Rabold
3 * 2019 Inria
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser General
6 * Public License v2.1. See the file LICENSE in the top level directory for more
7 * details.
8 */
9
20#ifndef PERIPH_CONF_H
21#define PERIPH_CONF_H
22
23#include "periph_cpu.h"
24#include "clk_conf.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
35#define TIMER_NUMOF (1)
42static const uart_conf_t uart_config[] = {
43 {
44 .addr = UART0_CTRL_ADDR,
45 .rx = GPIO_PIN(0, 16),
46 .tx = GPIO_PIN(0, 17),
47 .isr_num = INT_UART0_BASE,
48 },
49 {
50 .addr = UART1_CTRL_ADDR,
51 .rx = GPIO_PIN(0, 18),
52 .tx = GPIO_PIN(0, 23),
53 .isr_num = INT_UART1_BASE,
54 },
55};
56
57#define UART_NUMOF ARRAY_SIZE(uart_config)
65static const spi_conf_t spi_config[] = {
66 {
67 .addr = SPI1_CTRL_ADDR,
68 .mosi = GPIO_PIN(0, 3), /* D11 */
69 .miso = GPIO_PIN(0, 4), /* D12 */
70 .sclk = GPIO_PIN(0, 5), /* D13 */
71 },
72};
73
74#define SPI_NUMOF ARRAY_SIZE(spi_config)
82#define PWM_NUMOF (3)
85#ifdef __cplusplus
86}
87#endif
88
89#endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:46
SPI device configuration.
Definition periph_cpu.h:337
uint32_t addr
SPI control register address.
Definition periph_cpu.h:87
UART device configuration.
Definition periph_cpu.h:218
uint32_t addr
UART control register address.
Definition periph_cpu.h:63