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boards/frdm-k64f/include/periph_conf.h File Reference
#include "periph_cpu.h"
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Macros

Clock system configuration
#define KINETIS_CPU_USE_MCG   1
 
#define KINETIS_MCG_USE_ERC   1
 
#define KINETIS_MCG_USE_PLL   1
 
#define KINETIS_MCG_DCO_RANGE   (24000000U)
 
#define KINETIS_MCG_ERC_OSCILLATOR   0
 
#define KINETIS_MCG_ERC_FRDIV   6 /* ERC devider = 1280 */
 
#define KINETIS_MCG_ERC_RANGE   2
 
#define KINETIS_MCG_ERC_FREQ   50000000
 
#define KINETIS_MCG_PLL_PRDIV   19 /* divide factor = 20 */
 
#define KINETIS_MCG_PLL_VDIV0   0 /* multiply factor = 24 */
 
#define KINETIS_MCG_PLL_FREQ   60000000
 
#define CLOCK_CORECLOCK   KINETIS_MCG_PLL_FREQ
 
#define CLOCK_BUSCLOCK   (CLOCK_CORECLOCK / 2)
 
Timer configuration
#define PIT_NUMOF   (2U)
 
#define PIT_CONFIG
 
#define LPTMR_NUMOF   (0U)
 
#define LPTMR_CONFIG   {}
 
#define TIMER_NUMOF   ((PIT_NUMOF) + (LPTMR_NUMOF))
 
#define PIT_BASECLOCK   (CLOCK_BUSCLOCK)
 
#define PIT_CLOCKGATE   (BITBAND_REG32(SIM->SCGC6, SIM_SCGC6_PIT_SHIFT))
 
#define PIT_ISR_0   isr_pit1
 
#define PIT_ISR_1   isr_pit3
 
#define LPTMR_ISR_0   isr_lptmr0
 
UART configuration
#define UART_NUMOF   (1U)
 
#define UART_0_EN   1
 
#define UART_IRQ_PRIO   1
 
#define UART_CLK   CLOCK_CORECLOCK
 
#define KINETIS_UART   UART_Type
 
#define UART_0_DEV   UART0
 
#define UART_0_CLKEN()   (SIM->SCGC4 |= (SIM_SCGC4_UART0_MASK))
 
#define UART_0_CLK   UART_CLK
 
#define UART_0_IRQ_CHAN   UART0_RX_TX_IRQn
 
#define UART_0_ISR   isr_uart0_rx_tx
 
#define UART_0_PORT_CLKEN()   (SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK))
 
#define UART_0_PORT   PORTB
 
#define UART_0_RX_PIN   16
 
#define UART_0_TX_PIN   17
 
#define UART_0_AF   3
 
DAC configuration
#define DAC_CONFIG   {}
 
#define DAC_NUMOF   0
 
I2C configuration
#define I2C_NUMOF   (1U)
 
#define I2C_CLK   CLOCK_CORECLOCK
 
#define I2C_0_EN   1
 
#define I2C_IRQ_PRIO   1
 
#define KINETIS_I2C_F_ICR_LOW   (0x3D)
 
#define KINETIS_I2C_F_MULT_LOW   (2)
 
#define KINETIS_I2C_F_ICR_NORMAL   (0x1F)
 
#define KINETIS_I2C_F_MULT_NORMAL   (1)
 
#define KINETIS_I2C_F_ICR_FAST   (0x17)
 
#define KINETIS_I2C_F_MULT_FAST   (0)
 
#define KINETIS_I2C_F_ICR_FAST_PLUS   (0x10)
 
#define KINETIS_I2C_F_MULT_FAST_PLUS   (0)
 
#define I2C_0_DEV   I2C0
 
#define I2C_0_CLKEN()   (SIM->SCGC4 |= (SIM_SCGC4_I2C0_MASK))
 
#define I2C_0_CLKDIS()   (SIM->SCGC4 &= ~(SIM_SCGC4_I2C0_MASK))
 
#define I2C_0_IRQ   I2C0_IRQn
 
#define I2C_0_IRQ_HANDLER   isr_i2c0
 
#define I2C_0_PORT   PORTE
 
#define I2C_0_PORT_CLKEN()   (SIM->SCGC5 |= (SIM_SCGC5_PORTE_MASK))
 
#define I2C_0_PIN_AF   5
 
#define I2C_0_SDA_PIN   25
 
#define I2C_0_SCL_PIN   24
 
#define I2C_0_PORT_CFG   (PORT_PCR_MUX(I2C_0_PIN_AF) | PORT_PCR_ODE_MASK)
 
GPIO configuration
#define GPIO_IRQ_PRIO   CPU_DEFAULT_IRQ_PRIO
 
RTT and RTC configuration
#define RTT_NUMOF   (1U)
 
#define RTC_NUMOF   (1U)
 
#define RTT_DEV   RTC
 
#define RTT_IRQ   RTC_IRQn
 
#define RTT_IRQ_PRIO   10
 
#define RTT_UNLOCK()   (SIM->SCGC6 |= (SIM_SCGC6_RTC_MASK))
 
#define RTT_ISR   isr_rtc
 
#define RTT_FREQUENCY   (1)
 
#define RTT_MAX_VALUE   (0xffffffff)
 
Random Number Generator configuration
#define KINETIS_RNGA   RNG
 
#define HWRNG_CLKEN()   (SIM->SCGC6 |= (1 << 9))
 
#define HWRNG_CLKDIS()   (SIM->SCGC6 &= ~(1 << 9))
 

ADC configuration

#define ADC_NUMOF   (sizeof(adc_config) / sizeof(adc_config[0]))
 
static const adc_conf_t adc_config []
 

PWM configuration

#define PWM_NUMOF   (sizeof(pwm_config) / sizeof(pwm_config[0]))
 
static const pwm_conf_t pwm_config []
 

SPI configuration

Clock configuration values based on the configured 30Mhz module clock.

Auto-generated by: cpu/kinetis_common/dist/calc_spi_scalers/calc_spi_scalers.c

#define SPI_NUMOF   (sizeof(spi_config) / sizeof(spi_config[0]))
 
static const uint32_t spi_clk_config []
 
static const spi_conf_t spi_config []
 

Macro Definition Documentation

#define PIT_CONFIG
Value:
{ \
{ \
.prescaler_ch = 0, \
.count_ch = 1, \
}, \
{ \
.prescaler_ch = 2, \
.count_ch = 3, \
}, \
}

Definition at line 56 of file boards/frdm-k64f/include/periph_conf.h.

Variable Documentation

const adc_conf_t adc_config[]
static
Initial value:
= {
{ ADC0, GPIO_PIN(PORT_B, 10), 14 },
{ ADC0, GPIO_PIN(PORT_B, 11), 15 },
{ ADC0, GPIO_PIN(PORT_C, 11), 7 },
{ ADC0, GPIO_PIN(PORT_C, 10), 6 },
{ ADC0, GPIO_PIN(PORT_C, 8), 4 },
{ ADC0, GPIO_PIN(PORT_C, 9), 5 },
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.

Definition at line 106 of file boards/frdm-k64f/include/periph_conf.h.

const pwm_conf_t pwm_config[]
static
Initial value:
= {
{
.ftm = FTM0,
.chan = {
{ .pin = GPIO_PIN(PORT_A, 4), .af = 3, .ftm_chan = 6 },
{ .pin = GPIO_PIN(PORT_A, 2), .af = 3, .ftm_chan = 7 },
{ .pin = GPIO_PIN(PORT_C, 2), .af = 4, .ftm_chan = 1 },
{ .pin = GPIO_PIN(PORT_C, 3), .af = 4, .ftm_chan = 2 }
},
.chan_numof = 4,
.ftm_num = 0
}
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.

Definition at line 131 of file boards/frdm-k64f/include/periph_conf.h.

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = SPI0,
.pin_miso = GPIO_PIN(PORT_D, 3),
.pin_mosi = GPIO_PIN(PORT_D, 2),
.pin_clk = GPIO_PIN(PORT_D, 1),
.pin_cs = {
GPIO_UNDEF
},
.pcr = GPIO_AF_2,
.simmask = SIM_SCGC6_SPI0_MASK
}
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
use alternate function 2
#define GPIO_UNDEF
Define a custom GPIO_UNDEF value.

Definition at line 192 of file boards/frdm-k64f/include/periph_conf.h.