The friendly Operating System for the Internet of Things
boards/fox/include/periph_conf.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2014 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser General
5  * Public License v2.1. See the file LICENSE in the top level directory for more
6  * details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "periph_cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
32 #define CLOCK_HSE (16000000U) /* frequency of external oscillator */
33 #define CLOCK_CORECLOCK (72000000U) /* targeted core clock frequency */
34 /* configuration of PLL prescaler and multiply values */
35 /* CORECLOCK := CLOCK_SOURCE / PLL_DIV * PLL_MUL */
36 #define CLOCK_PLL_DIV (2)
37 #define CLOCK_PLL_MUL (9)
38 /* configuration of peripheral bus clock prescalers */
39 #define CLOCK_AHB_DIV RCC_CFGR_HPRE_DIV1 /* AHB clock -> 72MHz */
40 #define CLOCK_APB2_DIV RCC_CFGR_PPRE2_DIV1 /* APB2 clock -> 72MHz */
41 #define CLOCK_APB1_DIV RCC_CFGR_PPRE1_DIV2 /* APB1 clock -> 36MHz */
42 /* resulting bus clocks */
43 #define CLOCK_APB1 (CLOCK_CORECLOCK / 2)
44 #define CLOCK_APB2 (CLOCK_CORECLOCK)
45 
51 #define ADC_NUMOF (0)
52 
58 #define DAC_NUMOF (0)
59 
65 static const timer_conf_t timer_config[] = {
66  {
67  .dev = TIM2,
68  .max = 0x0000ffff,
69  .rcc_mask = RCC_APB1ENR_TIM2EN,
70  .bus = APB1,
71  .irqn = TIM2_IRQn
72  },
73  {
74  .dev = TIM3,
75  .max = 0x0000ffff,
76  .rcc_mask = RCC_APB1ENR_TIM3EN,
77  .bus = APB1,
78  .irqn = TIM3_IRQn
79  }
80 };
81 
82 #define TIMER_0_ISR isr_tim2
83 #define TIMER_1_ISR isr_tim3
84 
85 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
86 
92 static const uart_conf_t uart_config[] = {
93  {
94  .dev = USART2,
95  .rcc_mask = RCC_APB1ENR_USART2EN,
96  .rx_pin = GPIO_PIN(PORT_A, 3),
97  .tx_pin = GPIO_PIN(PORT_A, 2),
98  .bus = APB1,
99  .irqn = USART2_IRQn
100  },
101  {
102  .dev = USART1,
103  .rcc_mask = RCC_APB2ENR_USART1EN,
104  .rx_pin = GPIO_PIN(PORT_A, 10),
105  .tx_pin = GPIO_PIN(PORT_A, 9),
106  .bus = APB2,
107  .irqn = USART1_IRQn
108  }
109 };
110 
111 #define UART_0_ISR (isr_usart2)
112 #define UART_1_ISR (isr_usart1)
113 
114 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
115 
124 static const uint8_t spi_divtable[2][5] = {
125  { /* for APB1 @ 36000000Hz */
126  7, /* -> 140625Hz */
127  6, /* -> 281250Hz */
128  4, /* -> 1125000Hz */
129  2, /* -> 4500000Hz */
130  1 /* -> 9000000Hz */
131  },
132  { /* for APB2 @ 72000000Hz */
133  7, /* -> 281250Hz */
134  7, /* -> 281250Hz */
135  5, /* -> 1125000Hz */
136  3, /* -> 4500000Hz */
137  2 /* -> 9000000Hz */
138  }
139 };
140 
141 static const spi_conf_t spi_config[] = {
142  {
143  .dev = SPI2,
144  .mosi_pin = GPIO_PIN(PORT_B, 15),
145  .miso_pin = GPIO_PIN(PORT_B, 14),
146  .sclk_pin = GPIO_PIN(PORT_B, 13),
147  .cs_pin = GPIO_UNDEF,
148  .rccmask = RCC_APB1ENR_SPI2EN,
149  .apbbus = APB1
150  }
151 };
152 
153 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
154 
160 #define RTT_NUMOF (1U)
161 #define RTT_IRQ_PRIO 1
162 
163 #define RTT_DEV RTC
164 #define RTT_IRQ RTC_IRQn
165 #define RTT_ISR isr_rtc
166 #define RTT_MAX_VALUE (0xffffffff)
167 #define RTT_FREQUENCY (1) /* in Hz */
168 #define RTT_PRESCALER (0x7fff) /* run with 1 Hz */
169 
175 #define I2C_NUMOF (1U)
176 #define I2C_0_EN 1
177 #define I2C_IRQ_PRIO 1
178 #define I2C_APBCLK (36000000U)
179 
180 /* I2C 0 device configuration */
181 #define I2C_0_DEV I2C1
182 #define I2C_0_CLKEN() (periph_clk_en(APB1, RCC_APB1ENR_I2C1EN))
183 #define I2C_0_CLKDIS() (periph_clk_dis(APB1, RCC_APB1ENR_I2C1EN))
184 #define I2C_0_EVT_IRQ I2C1_EV_IRQn
185 #define I2C_0_EVT_ISR isr_i2c1_ev
186 #define I2C_0_ERR_IRQ I2C1_ER_IRQn
187 #define I2C_0_ERR_ISR isr_i2c1_er
188 /* I2C 0 pin configuration */
189 #define I2C_0_SCL_PIN GPIO_PIN(PORT_B,6)
190 #define I2C_0_SDA_PIN GPIO_PIN(PORT_B,7)
191 
193 #ifdef __cplusplus
194 }
195 #endif
196 
197 #endif /* PERIPH_CONF_H */
198 
USART_TypeDef * dev
USART device used.
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
UART device configuration.
#define GPIO_UNDEF
Define a custom GPIO_UNDEF value.
SPI configuration data structure.
cc2538_gptimer_t * dev
timer device
Timer configuration data.
cc2538_ssi_t * dev
SSI device.