boards/cc2538dk/include/periph_conf.h
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1 /*
2  * Copyright (C) 2014 Loci Controls Inc.
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CONF_H
20 #define PERIPH_CONF_H
21 
22 #include "cpu.h"
23 #include "periph_cpu.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
37 static const timer_conf_t timer_config[] = {
38  {
39  .chn = 2,
40  .cfg = GPTMCFG_16_BIT_TIMER, /* required for XTIMER */
41  },
42  {
43  .chn = 1,
44  .cfg = GPTMCFG_32_BIT_TIMER,
45  },
46  {
47  .chn = 2,
48  .cfg = GPTMCFG_16_BIT_TIMER,
49  },
50  {
51  .chn = 1,
52  .cfg = GPTMCFG_32_BIT_TIMER,
53  },
54 };
55 
56 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
57 
58 #define TIMER_IRQ_PRIO 1
59 
65 #define UART_NUMOF 1
66 
67 #define UART_0_EN 1
68 #define UART_1_EN 0
69 #define UART_2_EN 0
70 #define UART_3_EN 0
71 
72 #define UART_IRQ_PRIO 1
73 
74 /* UART 0 device configuration */
75 #define UART_0_DEV UART0
76 #define UART_0_IRQ UART0_IRQn
77 #define UART_0_ISR isr_uart0
78 /* UART 0 pin configuration */
79 #define UART_0_TX_PIN GPIO_PA1
80 #define UART_0_RX_PIN GPIO_PA0
81 #define UART_0_RTS_PIN GPIO_PD3
82 #define UART_0_CTS_PIN GPIO_PB0
83 
84 /* UART 1 device configuration */
85 #define UART_1_DEV UART1
86 #define UART_1_IRQ UART1_IRQn
87 #define UART_1_ISR isr_uart1
88 /* UART 1 pin configuration */
95 #define I2C_NUMOF 1
96 #define I2C_0_EN 1
97 #define I2C_IRQ_PRIO 1
98 
99 /* I2C 0 device configuration */
100 #define I2C_0_DEV 0
101 #define I2C_0_IRQ I2C_IRQn
102 #define I2C_0_IRQ_HANDLER isr_i2c
103 #define I2C_0_SCL_PIN GPIO_PA2 /* SPI_SCK on the SmartRF06 baseboard */
104 #define I2C_0_SDA_PIN GPIO_PA4 /* SPI_MOSI on the SmartRF06 baseboard */
105 
106 static const i2c_conf_t i2c_config[I2C_NUMOF] = {
107  {
108  .scl_pin = GPIO_PA2, /* SPI_SCK on the SmartRF06 baseboard */
109  .sda_pin = GPIO_PA4, /* SPI_MOSI on the SmartRF06 baseboard */
110  },
111 };
121 static const spi_clk_conf_t spi_clk_config[] = {
122  { .cpsr = 10, .scr = 31 }, /* 100khz */
123  { .cpsr = 2, .scr = 39 }, /* 400khz */
124  { .cpsr = 2, .scr = 15 }, /* 1MHz */
125  { .cpsr = 2, .scr = 2 }, /* ~4.5MHz */
126  { .cpsr = 2, .scr = 1 } /* ~10.7MHz */
127 };
128 
133 static const spi_conf_t spi_config[] = {
134  {
135  .dev = SSI0,
136  .mosi_pin = GPIO_PA4,
137  .miso_pin = GPIO_PA5,
138  .sck_pin = GPIO_PA2,
139  .cs_pin = GPIO_PD0
140  }
141 };
142 
143 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
144 
150 #define SOC_ADC_ADCCON_REF SOC_ADC_ADCCON_REF_AVDD5
151 
152 static const adc_conf_t adc_config[] = {
153  GPIO_PIN(0, 6),
154 };
155 
156 #define ADC_NUMOF (sizeof(adc_config) / sizeof(adc_config[0]))
157 
163 #define RADIO_IRQ_PRIO 1
164 
166 #ifdef __cplusplus
167 } /* end extern "C" */
168 #endif
169 
170 #endif /* PERIPH_CONF_H */
171 
I2C configuration options.
PD0.
Definition: cc2538_gpio.h:170
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
gpio_t scl_pin
pin used for SCL
PA5.
Definition: cc2538_gpio.h:151
Datafields for static SPI clock configuration values.
uint_fast8_t chn
number of channels
static const spi_clk_conf_t spi_clk_config[]
Pre-calculated clock divider values based on a CLOCK_CORECLOCK (32MHz)
PA4.
Definition: cc2538_gpio.h:150
16-bit timer configuration
32-bit timer configuration
PA2.
Definition: cc2538_gpio.h:148
SPI module configuration options.
uint8_t cpsr
CPSR clock divider.
ADC device configuration.
Timer configuration.
#define SSI0
SSI0 Instance.
Definition: cc2538_ssi.h:77
cc2538_ssi_t * dev
SSI device.