boards/arduino-due/include/periph_conf.h
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1 /*
2  * Copyright (C) 2014-2015 Freie Universit├Ąt Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
21 #ifndef PERIPH_CONF_H
22 #define PERIPH_CONF_H
23 
24 #include "periph_cpu.h"
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
34 /* targeted system core clock */
35 #define CLOCK_CORECLOCK (84000000UL)
36 /* external oscillator clock */
37 #define CLOCK_EXT_OSC (12000000UL)
38 /* define PLL configuration
39  *
40  * The values must fulfill this equation:
41  * CORECLOCK = (EXT_OCS / PLL_DIV) * (PLL_MUL + 1)
42  */
43 #define CLOCK_PLL_MUL (83)
44 #define CLOCK_PLL_DIV (12)
45 
46 /* number of wait states before flash read and write operations */
47 #define CLOCK_FWS (4) /* 4 is save for 84MHz */
48 
54 static const timer_conf_t timer_config[] = {
55  /* dev, channel 0 ID */
56  { TC0, ID_TC0 },
57  { TC1, ID_TC3 },
58 };
59 
60 #define TIMER_0_ISR isr_tc0
61 #define TIMER_1_ISR isr_tc3
62 
63 #define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0]))
64 
70 static const uart_conf_t uart_config[] = {
71  /* device, rx port, tx port, rx pin, tx pin, mux, PMC bit, IRGn line */
72  {(Uart *)UART, PIOA, PIOA, 8, 9, GPIO_MUX_A, ID_UART, UART_IRQn},
73  {(Uart *)USART0, PIOA, PIOA, 10, 11, GPIO_MUX_A, ID_USART0, USART0_IRQn},
74  {(Uart *)USART1, PIOA, PIOA, 12, 13, GPIO_MUX_A, ID_USART1, USART1_IRQn},
75  {(Uart *)USART3, PIOD, PIOD, 4, 5, GPIO_MUX_B, ID_USART3, USART3_IRQn}
76 };
77 
78 /* define interrupt vectors */
79 #define UART_0_ISR isr_uart
80 #define UART_1_ISR isr_usart0
81 #define UART_2_ISR isr_usart1
82 #define UART_3_ISR isr_usart3
83 
84 #define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
85 
91 static const spi_conf_t spi_config[] = {
92  {
93  .dev = SPI0,
94  .id = ID_SPI0,
95  .clk = GPIO_PIN(PA, 27),
96  .mosi = GPIO_PIN(PA, 26),
97  .miso = GPIO_PIN(PA, 25),
98  .mux = GPIO_MUX_A
99  }
100 };
101 
102 #define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
103 
109 static const pwm_chan_conf_t pwm_chan[] = {
110  { .pin = GPIO_PIN(PC, 21), .hwchan = 4, },
111  { .pin = GPIO_PIN(PC, 22), .hwchan = 5, },
112  { .pin = GPIO_PIN(PC, 23), .hwchan = 6, },
113  { .pin = GPIO_PIN(PC, 24), .hwchan = 7, }
114 };
115 
116 #define PWM_NUMOF (1U)
117 #define PWM_CHAN_NUMOF (sizeof(pwm_chan) / sizeof(pwm_chan[0]))
118 
120 #ifdef __cplusplus
121 }
122 #endif
123 
124 #endif /* PERIPH_CONF_H */
125 
PWM channel configuration data.
select peripheral function B
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
#define UART
UART register bank.
Definition: cc26x0_uart.h:126
select peripheral function A
gpio_t pin
GPIO pin connected to the channel.
UART device configuration.
SPI configuration data structure.
Timer configuration data.
cc2538_ssi_t * dev
SSI device.