adxl345_regs.h
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1 /*
2  * Copyright (C) 2017 Mesotic SAS
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef ADXL345_REGS_H
20 #define ADXL345_REGS_H
21 
22 #ifdef __cplusplus
23  extern "C" {
24 #endif
25 
30 #define ACCEL_ADXL345_CHIP_ID_REG (0x00)
31 #define ACCEL_ADXL345_THRESH_TAP (0x1D)
32 #define ACCEL_ADXL345_OFFSET_X (0x1E)
33 #define ACCEL_ADXL345_OFFSET_Y (0x1F)
34 #define ACCEL_ADXL345_OFFSET_Z (0x20)
35 #define ACCEL_ADXL345_TAP_DUR (0x21)
36 #define ACCEL_ADXL345_TAP_LAT (0x22)
37 #define ACCEL_ADXL345_TAP_WIN (0x23)
38 #define ACCEL_ADXL345_THRESH_ACT (0x24)
39 #define ACCEL_ADXL345_THRESH_INACT (0x25)
40 #define ACCEL_ADXL345_TIME_INACT (0x26)
41 #define ACCEL_ADXL345_ACT_INACT_CTL (0x27)
42 #define ACCEL_ADXL345_THRESH_FF (0x28)
43 #define ACCEL_ADXL345_TIME_FF (0x29)
44 #define ACCEL_ADXL345_TAP_AXES (0x2A)
45 #define ACCEL_ADXL345_ACT_TAP_STATUS (0x2B)
46 #define ACCEL_ADXL345_BW_RATE (0x2C)
47 #define ACCEL_ADXL345_POWER_CTL (0x2D)
48 #define ACCEL_ADXL345_INT_ENABLE (0x2E)
49 #define ACCEL_ADXL345_INT_MAP (0x2F)
50 #define ACCEL_ADXL345_INT_SOURCE (0x30)
51 #define ACCEL_ADXL345_DATA_FORMAT (0x31)
52 #define ACCEL_ADXL345_DATA_X0 (0x32)
53 #define ACCEL_ADXL345_DATA_X1 (0x33)
54 #define ACCEL_ADXL345_DATA_Y0 (0x34)
55 #define ACCEL_ADXL345_DATA_Y1 (0x35)
56 #define ACCEL_ADXL345_DATA_Z0 (0x36)
57 #define ACCEL_ADXL345_DATA_Z1 (0x37)
58 #define ACCEL_ADXL345_FIFO_CTL (0x38)
59 #define ACCEL_ADXL345_FIFO_STATUS (0x39)
66 #define ACCEL_ADXL345_CHIP_ID (0xE5)
67 
73 #define RES_10_BITS (0x03FF)
74 #define RES_11_BITS (0x07FF)
75 #define RES_12_BITS (0x0FFF)
76 #define RES_13_BITS (0x1FFF)
77 
83 #define INACT_Z_ENABLE (1 << 0)
84 #define INACT_Y_ENABLE (1 << 1)
85 #define INACT_X_ENABLE (1 << 2)
86 #define INACT_ACDC (1 << 3)
87 #define ACT_Z_ENABLE (1 << 4)
88 #define ACT_Y_ENABLE (1 << 5)
89 #define ACT_X_ENABLE (1 << 6)
90 #define ACT_ACDC (1 << 7)
91 
97 #define TAP_Z_ENABLE (1 << 0)
98 #define TAP_Y_ENABLE (1 << 1)
99 #define TAP_X_ENABLE (1 << 2)
100 #define SUPPRESS (1 << 3)
101 #define TAP_ALL_ENABLE (TAP_Z_ENABLE|TAP_Y_ENABLE|TAP_X_ENABLE)
102 
108 #define TAP_Z_SRC (1 << 0)
109 #define TAP_Y_SRC (1 << 1)
110 #define TAP_X_SRC (1 << 2)
111 #define ASLEEP (1 << 3)
112 #define ACT_Z_SRC (1 << 4)
113 #define ACT_Y_SRC (1 << 5)
114 #define ACT_X_SRC (1 << 6)
115 
121 #define RATE_MASK (0x0F)
122 #define LOWPOWER (1 << 4)
123 
129 #define WAKEUP_8HZ (0x00)
130 #define WAKEUP_4HZ (0x01)
131 #define WAKEUP_2HZ (0x02)
132 #define WAKEUP_1HZ (0x03)
133 #define SLEEP_BIT (1 << 2)
134 #define MEASURE_BIT (1 << 3)
135 #define AUTOSLEEP_BIT (1 << 4)
136 #define LINK_BIT (1 << 5)
137 
144 #define OVERRUN (1 << 0)
145 #define WATERMARK (1 << 1)
146 #define FREEFALL (1 << 2)
147 #define INACTIVITY (1 << 3)
148 #define ACTIVITY (1 << 4)
149 #define DOUBLE_TAP (1 << 5)
150 #define SINGLE_TAP (1 << 6)
151 #define DATA_READY (1 << 7)
152 
158 #define RANGE_MASK (0x03)
159 #define JUSTIFY (1 << 2)
160 #define FULL_RES (1 << 3)
161 #define INT_INVERT (1 << 5)
162 #define SPI_BIT (1 << 6)
163 #define SELF_TEST (1 << 7)
164 
170 #define SAMPLES_MASK (0x0F)
171 #define FIFO_TRIGGER_POS (4)
172 #define FIFO_TRIGGER (1 << FIFO_TRIGGER_POS)
173 #define FIFO_MODE_POS (6)
174 #define FIFO_MODE_MASK (0xC0)
175 
181 #define FIFO_ENTRIES_MASK (0x3F)
182 #define FIFO_TRIG (1 << 7)
183 
185 #ifdef __cplusplus
186 }
187 #endif
188 
189 #endif /* ADXL345_REGS_H */
190